TCAD Modeling Challenges for 22nm Node and beyond

摘要：

According to 2009 ITRS roadmap, advances in process technologies, introduction of new materials, and adoption of new device architectures are expected to enable CMOS scaling to 22nm node and beyond 1. The added process complexity will likely to lead to increased process development time and cost. Predictive TCAD modeling can be invaluable to guide development direction, narrow down experimental conditions and reduce the length and number of learning cycles. Significant TCAD modeling challenges exist in comprehending new physics and developing efficient and effective methodologies. This review paper focuses on FEOL modeling and highlights major challenges in: USJ, stress and variability modeling. Existing TCAD capability gaps and model development needs are discussed.

作者: Jeff Wu

作者单位: TCAD Division, R&D, Taiwan Semiconductor Manufacturing Company (TSMC) Ltd., Hsinchu, Taiwan

会议类型: 国际会议

会议名称: 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

会议地点: 上海

会议语种:英文

页码: 1778-1781

在线出版日期: 2010-11-01（万方平台首次上网日期，不代表论文的发表时间）