Impact of Hump Effect on MOSFET Mismatch in the Sub-threshold Area for Low Power Analog Applications

摘要：

Analog circuit designs are often biased to work in sub-threshold mode with good gate-source voltage matching performances. Depending on the process, hump effect may change the MOS characteristics for negative Bulk-Source Voltage (Vbs) and have a slight impact for VBS=0V. To model the hump effect, two narrow parasitic MOS are introduced in parallel with the main device. To accurately simulate matching degradation in sub-threshold mode, these parasitic transistors, in case of hump effect, have to be considered.

作者: Yohan Joly Laurent Lopez Jean-Michel Portal Hassen Aziza Yannick Bert Franck Julien Pascal Fornara

作者单位: STMicroelectronics, 190 Avenue Celestin Coq Zone Industrielle, 13106 Rousset, France IM2NP (UMR CNRS STMicroelectronics, 190 Avenue Celestin Coq Zone Industrielle, 13106 Rousset, France IM2NP (UMR CNRS 6242), 38 rue Frederic Joliot Curie, 13451 Marseille, France

会议类型: 国际会议

会议名称: 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

会议地点: 上海

会议语种:英文

页码: 1817-1819

在线出版日期: 2010-11-01（万方平台首次上网日期，不代表论文的发表时间）