A novel network on chip architecture-Stargon

摘要：

Network-on-Chip (NoC) is the most promising on-chipinterconnection scheme for multi-core processors. In this paper, we propose a novel NoC architecture called Stargon, which is inspired by the Spidergon. A simulation model has been developed to evaluate our architecture. We study the effect of the number of nodes, buffer depth and message length on the performance, and shows that at any situation Stargon is twice of performance compared with Spidergon.

作者: Xingxing Zhang Zewen Shi Heng Quan Xiaoyang Zeng Zhiyi Yu

作者单位: State Key Laboratory of ASIC & System, Fudan University, Shanghai 201203 China

会议类型: 国际会议

会议名称: 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

会议地点: 上海

会议语种:英文

页码: 2031-2033

在线出版日期: 2010-11-01（万方平台首次上网日期，不代表论文的发表时间）