会议专题

Reducing Cache Contention in a Multi-core Processor via a Scheduler

Multi-core architectures, which have multiple processing units on a single chip, are widely viewed as a way to achieve higher processor performance. Well scheduling of running threads on these processors will result in achieving higher performance. Modern multi-core systems are designed to allow clusters of cores to share various hardware structures, such as last-level caches, memory controllers, and interconnections, as well as prefetching hardware. Without considering these shared resources, scheduling the threads will cause serious degradation in overall performance of the system. In this paper we propose a novel algorithm to schedule the threads that considers these potential contentions to keep away from. The simulation results showed that the proposed scheduler would avoid from lots of contentions between threads on various resources especially on shared caches.

component multi-core architecture resource contention shared cache thread scheduling

S.Kazem Shekofteh Hossein Deldari Maryam Baradaran Khalkhali

Parallel and Distributed Processing Lab, Department ofComputer Engineering, Ferdowsi University ofMa Department of Computer Engineering, Islamic Azad University, Mashhad Branch, Mashhad, Iran

国际会议

2010 3rd International Conference on Advanced Computer Theory and Engineering(2010年第三届先进计算机理论与工程国际会议 ICACTE 2010)

成都

英文

1-4

2010-08-20(万方平台首次上网日期,不代表论文的发表时间)