A 60 GHz LNA with 18.6 dB gain and 5.7 dB NF in 90nm CMOS
A 60 GHz low noise amplifier is implemented in a commercial 90nm RF CMOS process. A scalable model based on electromagnetic simulation is adopted to model on-chip microstrip transmission lines. Firstpass silicon success has been achieved by accurate modeling of passive and active devices and careful layout. The three-stage LNA achieves 18.6 dB gain, a noise figure of 5.7 dB and an input PdB of-14.8 dBm. It consumes 24 mA from a 1.2 V supply. The total LNA die area with pads is 1.4 x OS mm2.
CMOS low none amplifier microstrip millimeter wave
Kai Kang James Brinkhoff Fujiang Lin
Institute of Microelectronics, A*STAR (Agency for Science, Technology and Research) 11 Science Park Institute of Microelectronics, A*STAR (Agency for Science, Technology and Research) 11 Science Park Institute of Microelectronics, AISTAR (Agency for Science, Technology and Research) 11 Science Park
国际会议
成都
英文
164-167
2010-05-08(万方平台首次上网日期,不代表论文的发表时间)