Design of a High Power Digital Tunable Filter
A high power digital tunable filter is presented. The filter uses high reverse bias voltage for PIN diode to ensure high handle power, and uses binary capacitor array to realize center frequency variation. The filter tuning range is from 30 MHz to 88MHz with a low insertion loss (better than 1.5 dB), high power (PidB > 49 dBm) and fast tuning speed(less than 30 uS). There is a good agreement with measured and calculated.
Tunable Filter, High Power, Binary Capacitor Array
Kunhe Chen Zhang Chen Lei Zhu
Nanjing Telecommunication Technology Institute Nanjing 210007, China
国际会议
成都
英文
496-498
2010-05-08(万方平台首次上网日期,不代表论文的发表时间)