会议专题

An Optimized AS Modulator in Fractional-N Frequency Synthesizer for UHF RFID Reader

A 3rd-order 3-bit single-loop Δ∑ modulator in fractional-N frequency synthesizer for UHF RFID Reader is optimized in terms of phase noise. Feed forward and feedback path structure is proposed in the Δ∑ modulator. The location of zeros and poles are placed at desired frequency for noise shaping by configuring feed forward and feedback coefficients. A fully integrated Δ∑ fractional-N frequency synthesizer with digital Δ∑ modulator is implemented in 0.18μm CMOS technology. The measured phase noise of the proposed Δ∑ fractional-N frequency synthesizer is 76dBc/Hz in-band and -125dBc/Hz at 1MHz offset from 856 MHz carrier and a loop bandwidth of 50 kHz. The rms jitter is 6.74ps and the integrated phase noise is 2.08° from 10kHz to 10MHz frequency offset.

Chunqi Shi Runxi Zhang Lei Chen Zongsheng Lai

East China Normal University, Shanghai, China

国际会议

2010 International Conference on Microwave and Millimeter Wave Technology(2010国际微波与毫米波技术会议 ICMMT2010)

成都

英文

1468-1471

2010-05-08(万方平台首次上网日期,不代表论文的发表时间)