A High Stability Low Drop-out Regulator With Fast Transient Response
This paper presents a high stability, fast transient response, low-dropout voltage regulator (LDO) with a novel stepping several stages Miller capacitance frequency compensation and a slew-rate enhanced (SER) circuit. The proposed frequency compensation scheme can guarantee the LDO stable for the entire load. By utilizing the SRE circuit, the proposed LDO provides fast settling time and small voltage variation for a pulsed output current of 0 to Imax. Implemented in a 0.35-μm CMOS process, the proposed LDO achieve 80 degree phase margin and a PSR of 60 dB at 10kHZ. The proposed SRE circuit improves the transient response with 110mV voltage variation and 0.5μS settling time for a 250mA load step. The maximum output current is 250mA and the regulatered output voltage is 2.5V. The proposed LDO consumes only 20μA of ground current at no load condition. The load and line regulation are 40μV/mA (ΔIload=250mA) and 2mV/V (ΔVDD=2V).
frequency compensation low drop-out regulator stability fast transient response
Jiake Wang Jinguang Jiang Shanshan Li Xu Gong Qingyun Li
Department of Physics Science and Technology, Wuhan University Wuhan, Hubei, China
国际会议
北京
英文
1-5
2010-06-25（万方平台首次上网日期，不代表论文的发表时间）