Methods to Enhance the Performance of Iterated Timing Analysis Algorithm
In circuit simulation, Relaxation-based algorithms have been proven to be faster and more flexible than the standard direct approach used in SPICE. ITA (Iterated Timing Analysis) algorithm has even been widely used in industry. This paper describes a new accelerating technique using the latency property of subcircuits and other accelerating methods based on Strength of Signal flow (SSF) for ITA algorithm. The definition of SSF, calculation method, and methods to utilize SSF all have been illustrated clearly. Experimental examples are given to justify the superior property of these proposed methods. A more powerful strategy for enhancing ITA is also designed and carefully justified.
Circuit Simulation Signal Flow Relaxationbased ITA
Chun-Jung Chen Bin-Cheng Chen Chih-Jen Lee Chang-Lung Tsai Li-Ping Chou Allen Y.Chang
Department of Computer Science Chinese Culture University Taipei,Taiwan Graduate Institute of Information Management School of Continue Education,Chinese Culture University
国际会议
2010 IEEE信息与自动化国际会议(ICIA 2010)
哈尔滨
英文
1-6
2010-06-20(万方平台首次上网日期,不代表论文的发表时间)