On-Chip Compensated Error Amplifier for Voltage-Mode Buck Converters

摘要：

An on-chip compensated error amplifier in a voltage-mode buck converter is proposed in the paper. The compensated error amplifier is composed of two blocks, unit gain zero generation block and gain block, realizing phase shift and gain of the feedback loop, respectively. Compared to conventional type III compensated error amplifier in voltage-mode buck converter, the proposed circuit has much smaller passive component values, enabling full integration of the voltage mode buck converter in SoC. The converter is designed in 0.13μm CMOS process, operating typically at 1.5 MHz pulse width modulation (PWM). The simulation results show the converter with on-chip compensated error amplifier achieves both 0.3％ load regulation and 10μs load step response time for load step between 200mA and 700mA.

作者: Shaowei Zhen Bo Zhang Ping Luo Jun Chen Huiming Wu

作者单位: State key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, Sichuan, 610054, P. R. China

会议类型: 国际会议

会议名称: 2010 International Conference on Communications,Circuits and Systems(2010年通信、电路与系统国际会议)

会议地点: 成都

会议语种:英文

页码: 565-568

在线出版日期: 2010-06-28（万方平台首次上网日期，不代表论文的发表时间）