An Improved Chipset of Synchronous Rectification Controller Applied In Isolated Topology
This paper begins by illustrating the issue of conventional synchronous rectification, vertical conduction, which largely reduces the efficiency, affects safety utilization of synchronous rectification controller. Next, the improved chipset is presented, including the master chip and slave chip, wherein the former is a current-mode pulse-width modulated (PWM) signal controller with pre-pulse-width modulated (PPWM) signal and the latter is a controller with the function of synchronous rectification drive and voltage feedback. To dig deeply into the idea exhibited from this improved topology, modulation of master chip signal and demodulation of slave chip signal are emphasized. Phenomenon of vertical conduction is eliminated in this topology so that the utilization could be reliable and simple, the efficiency could be enhanced. Finally, an example is presented to describe the use of the chipset.
Bincheng Que Bumin Liu Cuiqin Fu
University of Electronic Science and technology of China Chengdu, Sichuan, China
国际会议
2010 International Conference on Communications,Circuits and Systems(2010年通信、电路与系统国际会议)
成都
英文
601-604
2010-06-28（万方平台首次上网日期，不代表论文的发表时间）