A Simple and Effective ESD Protection Structure for High-Voltage-Tolerant I/O Pad
A simple and effective ESD protection structure is proposed for the high-voltage-tolerant I/O pad. It can tolerate a voltage higher than the power supply voltage without the leakage current caused by PMOS in original GGNMOS/ GDPMOS protection structure. And it can provide a direct current path under PD/ND mode ESD stress, which is missing in general ESD design for the high-voltage-tolerant I/O pad. It can sustain 2.7A TLP stress according to our simulation result. This protection structure can also be used for high voltage and high power open drain driver and the negative-voltage-tolerant I/O pad.
Hang Fan Lingli Jiang Bo Zhang
University of Electronic Science and Technology of China, Chengdu, Sichuan 610054, China
国际会议
2010 International Conference on Communications,Circuits and Systems(2010年通信、电路与系统国际会议)
成都
英文
605-608
2010-06-28(万方平台首次上网日期,不代表论文的发表时间)