Analysis and Optimization of High-Voltage Devices in a BCD Process
This paper presents two-dimensional process and device(15V) simulation results and optimization of power device in a 0.35um Bipolar/CMOS/DMOS(BCD) process. Detailed device simulations and structure designs have been done. Test structures with specific considerations have been developed. With both simulation and experimental results, the optimized devices show excellent performance, which have been demonstrated with characterization results from devices on wafers from process qualification lots.
Chunxiao Fu Fan Xu Yuhua Cheng
Shanghai Research Institute of Micro Electronics, Peking University, Shanghai, China School of Softw Shanghai Research Institute of Micro Electronics, Peking University, Shanghai, China ShenZhen Gradua
国际会议
China Semiconductor Technology International Conference 2010(中国国际半导体技术大会 CSTIC)
上海
英文
121-124
2010-03-18(万方平台首次上网日期,不代表论文的发表时间)