A Case Study of Hierarchical Diagnosis for Core-Based SoC

摘要：

In this paper, a silicon debug case study was given in the context of a hierarchical diagnosis flow for core-based SoC. We discuss (1) how to design a simple core wrapper that supports at-speed test, (2) how to map the failures collected from the chip level to core level, and (3) how to perform failure analysis and silicon debug under the guidance of diagnosis results.

作者: Eric Wang Yu Huang Wu-Tung Cheng Wu Yang James Fu

作者单位: Freescale Semiconductor, 288 ZhuYuan Rd, SuZhou, JiangSu, P.R.C, 215011 Mentor Graphics Corporation, 8005 S.W. Boeckman Rd., Wilsonville, OR 97070, USA

会议类型: 国际会议

会议名称: China Semiconductor Technology International Conference 2010(中国国际半导体技术大会 CSTIC)

会议地点: 上海

会议语种:英文

页码: 185-190

在线出版日期: 2010-03-18（万方平台首次上网日期，不代表论文的发表时间）