Anomalous Off-leakage Currents in CMOS Devices and Its Countermeasures
In this paper, an anomalous off-leakage current (AOLC) issue in CMOS devices is reported. As observed in pMOS universal curve (Ioff vs. Idsat), for AOLC, there are some scattering points with 2～3 magnitude order higher off-leakage current as compared with normal ones. We have identified this AOLC mechanism as that PMOS implanted dopant species penetrate through gate-stack with narrow process window. This is resulted from shrinking of poly-SiON gate length and high dose source-drain (SD), as well as source-drain extension ion implants applied in these devices. To suppress AOLC, several process factors have been investigated and optimized from an integration point of view, including: a) nitrogen concentration and profile control in SiON gate; b) poly thickness optimization and grain size reduction; and c) ion implant optimization, especially by reducing or eliminating energy contamination (EC).
Yonggen He Jared Kuo Yong Chen Dibao Zhou Jianhua Ju Jiyue Tang ZhiBiao Zhao Ming Yin Junfeng Lu
Semiconductor Manufacturing International Corp., No.18, Zhangjiang Road, ShangHai, P.R.C Applied Materials, No 1388, Zhangdong Road, ShangHai, P.R.C Mattson Technology, Inc, No.28, Xinjiangqiao Road, ShangHai, P.R.C Varian Semiconductor Equipment, No.800, Shangcheng Road, ShangHai, P.R.
国际会议
China Semiconductor Technology International Conference 2010(中国国际半导体技术大会 CSTIC)
上海
英文
315-320
2010-03-18（万方平台首次上网日期，不代表论文的发表时间）