Simultaneous Double Side Grinding of Silicon Wafers: A Further Investigation into Grinding Marks Pattern

摘要：

Simultaneous double side grinding (SDSG) is one of the state-ofart processes to flatten silicon wafers. A critical issue in SDSG is the grinding marks pattern. In this paper, a mathematical model is developed to study the grinding marks pattern in SDSG of silicon wafers. The model is used to simulate the grinding marks pattern and predict the number of wafer rotations needed to generate the grinding marks pattern. One practical application of the model is also discussed.

作者: Z.C. Li Bin Lin Wangping Sun X. H. Zhang

作者单位: Department of Industrial & Systems Engineering, North Carolina Agricultural & Technical State Univer Mechanical Engineering College, Tianjin University, Tianjin 300072, China Department of Manufacturing & Mechanical Engineering Technology, Oregon Institute of Technology, Kla Seagate Technology, Minneapolis, Minnesota 55435, USA

会议类型: 国际会议

会议名称: China Semiconductor Technology International Conference 2010(中国国际半导体技术大会 CSTIC)

会议地点: 上海

会议语种:英文

页码: 395-400

在线出版日期: 2010-03-18（万方平台首次上网日期，不代表论文的发表时间）