Interconnect Technologies and Advanced Packaging for High Performance Computing
The quest for high speed data processing continues to drive the industry to increase L1 and L2 on –chip caches and near-processor memories in large-scale computer systems. However, the increased latency and process yields limit chip area for L1 and L2 caches. Therefore alternative solutions beyond on-chip memory are being aggressively pursued. In this paper a high-level computer memory hierarchy and the corresponding interconnect technologies on each level of memory structures are summarized. We introduce a new MCM package technology based on proximity communication (PxCMCM package) and discuss its merits compared to conventional MCM. Challenges and recent research results on PxC-MCM solution are presented as well.
Jing Shi Theresa Sze Deqiang Song Dawei Huang John E Cunningham
Sun Microsystems Inc. 9515 Towne Centre Dr, San Diego CA 92121, USA
国际会议
China Semiconductor Technology International Conference 2010(中国国际半导体技术大会 CSTIC)
上海
英文
819-824
2010-03-18（万方平台首次上网日期，不代表论文的发表时间）