Power SO-8: An Interconnect Case Study
With the rising cost of Au material, many semiconductor device manufacturers are evaluating alternative interconnect technologies to reduce manufacturing costs. Shrinking package sizes, increasing electrical performance requirements and environment-friendly packaging objectives are additional considerations when choosing a gold replacement. The small outline, discrete power semiconductor market can be described as a sub-category of discrete semiconductors utilizing multiple 2-mil (or larger) Au wires to interconnect the die and the package leads. Three primary technologies are competing to replace Au in this market: Cu Wire, Cu Clip, and Al Ribbon. This paper explores observed benefits of these competing technologies in two example Power SO-8 packages. In this comparison, we will examine the electrical performance, productivity, production yield, manufacturing cost-per-part, product-line flexibility and lead-free compliancy for each interconnect method. The conclusions can be extrapolated to similar packages, such as Small Outline Non-leaded (SON or PDFN), Power QFN, Driver MOSFET, and Bi-Polar Transistor packages.
Garrett Wong
Orthodyne Electronics Corporation, a Division of Kulicke and Soffa Industries, Inc. 16700 Red Hill Ave, Irvine, CA 92606
国际会议
China Semiconductor Technology International Conference 2010(中国国际半导体技术大会 CSTIC)
上海
英文
865-875
2010-03-18（万方平台首次上网日期，不代表论文的发表时间）