DDR2/DDR3 Interface Signal Integrity Analysis Based on IBM Generic Package Model
The data rate of Double Data Rate (DDR) memory interface has become higher, Signal Integrity (SI) analysis is very important for current DDR system design to meet performance requirement. The chip/package types, board level interconnection, driver/receiver modes and power supply network are key factors for the design specification, analysis based on design applications should be performed to evaluate delay, reflection, jitter, simultaneous switching power noise, timing budget for the DDR system. This paper presents the method of performing DDR2/DDR3 interface SI simulation by using IBM Generic Package Model (GPM).
Yin Wen Pang Ze Gui Han Hai Tao
IBM ASIC Design Center, Shanghai, China
国际会议
China Semiconductor Technology International Conference 2010(中国国际半导体技术大会 CSTIC)
上海
英文
923-928
2010-03-18（万方平台首次上网日期，不代表论文的发表时间）