Fabrication of SB-MOSFETs on SOI Substrate Using Ni Silicide Containing Er Interlayer

摘要：

SB-MOSFETs were fabricated on SOI substrates by applying novel Schottky barrier height modulation technique of Er interlayer insertion at the interface of Ni/Si prior to Ni silicidation process. It was found that Er interlayer insertion lowered Schottky barrier height for electrons while no significant increase of the resistivity in the Er interlayer inserted films compare to pure Ni silicide films in the annealing temperature range of 500-750 ℃. Effects of Er insertion to the transistor characteristics of SOI SB-MOSFETs are also discussed.

作者: W. Hosoda H. Iwai K. Ozawa K. Kakushima P. Ahmet K. Tsutsui A. Nishiyama N. Sugii K. Natori T. Hattori

作者单位: Frontier Research Center, Tokyo Institute of Technology 4259 S2-20, Nagatsuta, Midori-ku, Yokohama, Interdisciplinary Graduate School of Science and Engineering, Tokyo Institute of Technology 4259 S2-

会议类型: 国际会议

会议名称: China Semiconductor Technology International Conference 2010(中国国际半导体技术大会 CSTIC)

会议地点: 上海

会议语种:英文

页码: 1105-1110

在线出版日期: 2010-03-18（万方平台首次上网日期，不代表论文的发表时间）