A Hardware/Software Co-design of a Face Detection Algorithm Based on FPGA
This paper presents the implementation of a face detection algorithm on FPGA for an eye mouse control system.An improved algorithm of skin color module and binary image projection is used to ensure real-time detection. The system is based on a hardware/software co-design, which consists of a dedicated hardware accelerator that solves the parts of the algorithm with higher computational cost and an embedded microprocessor that manages the control process and executes the rest of the algorithm. Several optimization methods have been accomplished to enhance performance. The system has been implemented on an Altera Cyclone II FPGA using a Nios embedded soft-core processor and it is benchmarked against a software implementation, it is demonstrated that a 640X480pixel image can be analyzed in 96ms with a clock frequency of 100MHz.
skin color segmentation binary image projection hardware/software co-design hardware optimization
Che Ming Chang Yisong
School of Computer Science and Technology Tianjin University Tianjin 300072, China
国际会议
长沙
英文
109-112
2010-03-13（万方平台首次上网日期，不代表论文的发表时间）