A Novel Directory-Based Non-Busy, Non-Blocking Cache Coherence

摘要：

The implementation of multiprocessors cache coherence and memory consistency can help the homemade CPUs support a wide range of system designs. We have made a lot of research on various cache coherence protocols, such as Piranha13 prototype system, GS32012 and AMD641. A directory-based, non-busy, non-blocking Cache Coherence (NB2CC) protocol is introduced here. It divides the serial processing into two steps: conflict detection and conflict solution. Conflict detection is completed at the home node, while conflict solution is distributed to owners. This makes two main contributions: first, unnecessary ordering requirements are eliminated to achieve more concurrency and pipeline performance when conflicts occur; secondly, protocol overhead is much decreased, which brings great applicability to different designs.

关键词： cache coherence1 non-busy2 non-blocking3

作者: Huang Yongqin Yuan Aidong Li Jun Hu Xiangdong

作者单位: Jiangnan Institute of Computing Technology, Wuxi 214083, China

会议类型: 国际会议

会议名称: 2009 International Forum on Computer Science-Technology and Applications(2009年国际计算机科学技术与应用论坛 IFCSTA 2009)

会议地点: 重庆

会议语种:英文

页码: 374-379

在线出版日期: 2009-12-25（万方平台首次上网日期，不代表论文的发表时间）