CMOS Preamplifier for High Performance Computing
A preamplifier was realized in SMIC 0.18μm CMOS technology for the applications of high performance computing. The preamplifier employs the regulated cascade (RGC) configuration as the input stage. Cadence Virtuoso simulations demonstrate the transimpedance gain of 55.75dBohms and-3dB bandwidth of 3.77GHz for 0.62pF photodiode capacitance from a single 1.8V supply. And when the input current amplitude is 30μApp, the output voltage is achieved to be 18.50mV. The simulation results demonstrate the preamplifier with DC consumption of 29.66mW could work in 5Gbps high performance computing data transmission system.
high performance computing preamplifier 0.18μm CMOS technology
Qin Feiyan Li Lei An Qi Wang Yunfeng
Shenzhen Institute of Advanced Integration Technology, Chinese Academy of Sciences/The Chinese Unive Shenzhen Institute of Advanced Integration Technology, Chinese Academy of Sciences/The Chinese Unive
国际会议
2009 International Workshop on Information Security and Application(2009 信息安全与应用国际研讨会)
青岛
英文
425-428
2009-11-21（万方平台首次上网日期，不代表论文的发表时间）