A 5Gb/s Optical Receiver Front-End in 0.18μm CMOS Technology

摘要：

A 5Gb/s optical receiver front-end for optical interconnection is presented in this paper. A transimpedance amplifier (TIA), limiting amplifiers (LA), output buffer and a bias circuit are integrated in deep N well 0.18μm CMOS technology. As the input current amplitude is 30μA, the differential output voltage is achieved to be 124 mV. The linear gain is 78.8dBΩ and consumes 200mW under 1.8V supply. Without on-chip inductor, the core size of the circuit is only 800×300μm2.

关键词： CMOS optical receiver transimpedance amplifier limiting amplifier

作者: An Qi Li lei Liang yuanjun Ke Lingzhi

作者单位: Shenzhen Institute of Advanced Integration Technology, Chinese Academy of Sciences/The Chinese Unive Shenzhen Institute of Advanced Integration Technology, Chinese Academy of Sciences/The Chinese Unive

会议类型: 国际会议

会议名称: 2009 International Workshop on Information Security and Application(2009 信息安全与应用国际研讨会)

会议地点: 青岛

会议语种:英文

页码: 481-483

在线出版日期: 2009-11-21（万方平台首次上网日期，不代表论文的发表时间）