5 Gb/s Optical Receiver Analog Front-end Circuit Design
An optical receiver analog front-end circuit is implemented in SMIC 0.18um Mixed-signal process. The circuit provided an overall gain of 85dB with n bandwidth of 4.36 GHz while drawing 150mW from a 1.8 V supply. A 2.5 V supply is used which only offers a voltage potential. The chip area is only 1.0*0.7mm2, including the pads. Some improvements aiming at boosting the circuit performance are also presented.
transimpedace amplifier(TIA) limiting amplifler(LA) second-order active feedback
Liu Shuaifeng Li Lei Liang Yuanjun Zhu Wenlong
Shenzhen Institute of Advaneed Integration Technology, Chinese Academy of Sciences/Chinese Universit Shenzhen Institute of Advaneed Integration Technology, Chinese Academy of Sciences/Chinese Universit Shenzhen Institute of Advaneed Integration Technology, Chinese Academy of Sciences/Chinese Universit
国际会议
2009 International Workshop on Information Security and Application(2009 信息安全与应用国际研讨会)
青岛
英文
683-685
2009-11-21(万方平台首次上网日期,不代表论文的发表时间)