A Common On-board Hardware Architecture for Intrusion Detection System

摘要：

An Intrusion Detection System (IDS) implements pattern matching approach on the network traffic to find the malicious packets carrying attack signatures. In this paper, a common Field Programmable Gate Array (FPGA) based on-board hardware architecture which is compatible with both ordinary string and Perl Compatible Regular Expression (PCRE) pattern matching is proposed to accelerate IDS. Furthermore, a flexible storage structure which is suitable for many general hardware matching algorithms and an optimized combinational logic circuit structure for PCRE matching are designed. With the synchronization of a connection decoder, ordinary string matching module coordinates with PCRE matching module to implement string-PCRE mixed rule.

关键词： FPGA IDS PCRE pattern matching

作者: Chao Kong Bo Yang Zhiping Jia Zhenxiang Chen

作者单位: School of Computer Science and Technology Shandong University Jinan, China School of Information Science and Engineering University of Jinan Jinan, China

会议类型: 国际会议

会议名称: The First International Conference on Multimedia Information Networking and Security(第一届国际多媒体网络信息安全会议 MINES 2009)

会议地点: 武汉

会议语种:英文

页码: 1058-1061

在线出版日期: 2009-11-18（万方平台首次上网日期，不代表论文的发表时间）