40 Gbit/s On-Off-Keyed System with 5.71 GHz Clock Recovery Circuit using Duty Cycle Division Multiplexing

摘要：

We show the realization of 40 Gbit/s on-off-keyed system that can be recovered at 5.71 GHz clock using duty cycle division multiplexing technique with the receiver sensitivity of –22.1 dBm.

关键词： (060.2330) Fiber optics communications (060.4230) Multiplexing

作者: G. Amouzad Mahdiraji A. Malekmohammadi A. Fauzi Abas M. Khazani Abdullah

作者单位: Department of Computer and Communication Systems Engineering, University Putra Malaysia, 43400 Serda Significant Technologies Sdn. Bhd., 43400 Serdang, Selangor, Malaysia

会议类型: 国际会议

会议名称: ACP2009亚太光纤通信与光电国际会议

会议地点: 上海

会议语种:英文

页码: 1-2

在线出版日期: 2009-11-01（万方平台首次上网日期，不代表论文的发表时间）