Design 8-bit neural ADC with exponential variable controlling threshold
For overcoming shortcoming on the local minima and neuron quantity at the hidden layer in which several neural-based analogue-digital convertors (ADCs), a novel 8-bit ADC based on a new algorithm is designed. The new algorithm is similar to successive approximation method, but to attribute parallel algorithm. It adjusts weighting by the exponential alterable threshold. The global circuit is a two-step 8-bit ADC been made up of coarse ADC and fine ADC. In which comparators threshold adjust to use single neuron-MOS achieved. The neuron-MOS as simple DAC is applied to all what is needed in two-step ADC. In the architecture, comparator quantity has a linear relation with the digits of ADC that achieved trade off between speeds and die areas.
Artificial neural networks (ANN) Analog to digital converters (ADC) Neuron-MOS (vMOS) Threshold
Cao Xin-liang Yu Ning-mei
Faculty of automation Information Engineering, Xian University of Technology Faculty of Electronics Faculty of automation Information Engineering, Xian University of Technology Xian 710048, China
国际会议
长沙
英文
2039-2042
2009-10-10（万方平台首次上网日期，不代表论文的发表时间）