会议专题

A Programmable Multi-Format Video Decoder

In this paper, we propose a VLSI design of Programmable Multi-Format Video Decoder (PMD) to support video codec standards such as MPEG-2, MPEG-4, H.264, and VC-I. It is a hardware and software hybrid system by moving large portion of the complicated data paths, control logics, and computations into processors as software. More flexibility and expandability of the design is achieved by increasing software portion. The required performance for Full-HD video decoding is delivered by the assistance of hardwired logic blocks. The burden of hardwired logic design is reduced.

video codec VLSI Design media processor H.264

Jongwoo Bae Youngsung Sob Daewon Kim Myungho Lee

Department of Information Engineering Myongji University Yongin, Korea

国际会议

2009 Second International Conference on Intelligent Computation Technology and Automation(2009 第二届IEEE智能计算与自动化国际会议 ICICTA 2009)

长沙

英文

3004-3007

2009-10-10(万方平台首次上网日期,不代表论文的发表时间)