An Improved Design of Digital Calibration Arithmetic Applied in Pipeline ADC

摘要：

Digital calibration arithmetic becomes more and more widely applied in pipeline ADC with high precision, the structure of pipeline ADC based on digital calibration is commonly 1.5bit/stage presently. 2bit/stage, the structure of which has strong superiority in power consumption and chip size, is adopted in this paper after analyzing the advantages and disadvantages of different kinds of structures. An improved digital calibration arithmetic is designed, which has solved the problem of accuracy of calibrating coefficients in present arithmetic and made the calibrated output data more accurate. The result indicates that the improved digital calibration arithmetic makes the system linearity get highly upgraded.

关键词： pipeline ADC 2bit/stage improved digital calibration arithmetic linearity

作者: Jinghe Wei Liming Qian Zongguang Yu Jiannan Yao Longxing Shi

作者单位: The 58th Research Institute of CETC Wuxi, China Southeast University Nanjing, China

会议类型: 国际会议

会议名称: 2009 International Conference on Applied Superconductivity and Electromagnetic Devices(应用超导与电磁装置技术国际会议 ASEME 2009)

会议地点: 成都

会议语种:英文

页码: 115-118

在线出版日期: 2009-09-25（万方平台首次上网日期，不代表论文的发表时间）