Reconfigurable Computing Architecture Survey and introduction
Reconfigurable computing has been driven largely by the development of commodity field-programmable gate arrays (FPGAs). Standard FPGAsare somewhat of a mixed blessing for this field.In this survey we give a brief overview of programming logics and we present configurable logic block (CLB) and Look Up Table (LUT) as logic elements. Also we presented the definition of fine and coarse-grain architectures and present some commercial examples.This survey is also introduced the reconfigurable computing models like static and dynamic, single and multi-context and partial reconfiguration architectures. Finally run-time reconfigurable computing and the coupling of reconfigurable processing unit (RUP) delineated.
Reconfigurable computing ASIC Field Programmable LUT CLB FPGA reconfigurable systems Runtime reconfiguration VHDL RUT
Ali Azarian MahmoodAhmadi
Department of computer Engineering PayameNoorUniversity (PNU) Shushtar, Iran Department of Computer Engineering Delft University of Technology Delft, the Netherlands
国际会议
北京
英文
1595-1600
2009-08-08(万方平台首次上网日期,不代表论文的发表时间)