Performance comparison of Autocorrelation and CORDIC algorithm implemented on FPGA for OFDM based WLAN

摘要：

This paper deals with design and implementation of Autocorrelator and CORDIC algorithm for OFDM based WLAN on FPGA. The autocorrelator is used for frame detection and carrier frequency offset estimation. The CORDIC is used to estimate the frequency offset and to calculate the division in the channel estimation algorithm. A fast pipelined CORDIC architecture and autocorrelator is designed and implemented on FPGA. HDL and test bench is developed to simulate and verify the functionality of both the modules. The design is implemented on Spartan-2 100K, Spartan-3 100K and Virtex-2 2 Million gate capacity devices to check the performances of hardware implementation. It is found that as the technology changes from I30nm FPGA to 90nm FPGA the design speed increases from 100 MHz to 229 MHz for autocorrelator and 24 MHz to 55 MHz, at the same time the design consumes more power this is due to the fact that Virtex devices have more gate capacity and hence more power consumption. The sequential logic also reduces drastically. The design consumes almost equal number of macros on the entire implementation platform. The design is optimized for area and power requirements.

关键词： Autocorrelation CORDIC FPGA OFDM WLAN

作者: Sudhakar Reddy.P Ramachandra Reddy.G

作者单位: Dept. of ECE,Sri Kalahasteeswara Institute of Technology, Srikalahasthi, Andhra Pradesh, India Dept. of ECE, Sri Venkateswara University,Tirupathi, Andhra Pradesh, India

会议类型: 国际会议

会议名称: The International Conference on Communication Software and Networks(2009 IEEE通信软件与网络国际会议 ICCSN 2009)

会议地点: 成都

会议语种:英文

页码: 575-579

在线出版日期: 2009-02-20（万方平台首次上网日期，不代表论文的发表时间）