An Advanced MIPS32/64 Compatible Instruction Set Simulator

摘要：

This article detailed describes a feasible plan for MIPS32/64 compatible instruction set simulator. It simulate the CPU hardware behavior using C++ program language,using reusable ISS to deal with the compatibility,and a multi-level index technology is used during the decoding time to make it a reasonable speed.It can mimic all the instructions except float point instructions,this method is more easy to implement and have a good compatibility with systemC TLM simulation technology.

关键词： instruction set instruction set simulator instruction set architecture MIPS32 MIPS64

作者: CAI Qixian LIU Ming

作者单位: Dept.of Computer Engineering,Guangxi University of Technology,Liuzhou 545006,China Dept.of Electr.Inform.& Control Engineer.,Guangxi University of Technology,Liuzhou 545006,China

会议类型: 国际会议

会议名称: 2009 International Conference on Information,Electronic and Computer Science(2009 国际信息、电子与计算机工程学术会议)

会议地点: 青岛

会议语种:英文

页码: 61-64

在线出版日期: 2009-11-21（万方平台首次上网日期，不代表论文的发表时间）