Trends of Terascale Computing Chips in the Nezt Ten Years

摘要：

Moores law steadily continues though facing a number of challenges. This paper identifies ongoing and desirable trends to exploit the technology capacity and further Moores law for terascale on-chip computing architectures in the next ten years.Four foreseeable trends are: from single core to many cores,from bus-based to network-based interconnect,from centralized memory to distributed memory, and from 2D integration to 3D integration.We motivate these trends and show that the number of design choices for computing chips is increasing rapidly,leading to an exploding design space with uncountable opportunities for the innovative architect.Moreover,we envision that the multi core Network-on-Chip will become an infrastructure backbone and accumulate many other infrastructural functions such as memory,power and resource management, testing and diagnostic services.

关键词： Computer Architecture Network-on-Chip Multi-core System Distributed Memory 3D Integration

作者: Zhonghai Lu Axel Jantsch

作者单位: Dept.of Electronics,Computer and Software Systems,KTH-The Royal Institute of Technology,Stockholm,Sweden

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 62-66

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）