A high Power Efficiency Reconfigurable Processor for Multimedia Processing
Nowadays mobile multimedia raise the demand of higher performance,larger amounts of flexibility as well as strict energy constrains. Reconfigurable Multimedia Array Processor (ReMAP) provides architecture with high programmable coarse-grained computational resources and flexible interconnect. To reduce the power consumption of memory access,we present an approach for computing control of the reconfigurable processor.By configuring the operation and settling down the data path of computational resources as initialization, data stream in processor accomplishing algorithm implement without access context memory frequently, which can achieve barely the same energy consumption as ASICs.
reconfigurable processor multimedia power efficiency coarse-grain
Peng Dai Xinan Wang Xing Zhang Qiuqi Zhao Yan Zhou Yachun Sun
Key Lab of Integrated Microsystems Science & Engineering Applications,A406,Peking University Shenzhe University of PeKing,BeiJing,100871 China Shenzhen National lntergrated Circuit Design Industrial Center,Shenzhen 518055 P.R.China
国际会议
2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)
长沙
英文
67-70
2009-10-20(万方平台首次上网日期,不代表论文的发表时间)