An Efficient Parallel Instruction Ezecution Method for VLIW DSP
LILY is a high performance VLIW DSP processor for multimedia applications,developed by Tsinghua University. The processor classifies the instructions,and determines whether the instructions should be issued in parallel according to the order of the instructions.Under this parallelism,LILY processor is capable of saving one bit of operation code in the condition of inserting very few no operation (NOP) instructions.In addition,it is needed to design a corresponding assembler to accommodate the above new parallelism,which aids LILY to complete the highly efficient method. The evaluation results show satisfactory suitability of the processor for high performance applications, high code density,and small program code size.
VLIW (very long instruction word) DSP(digital signal processor) assembler
Mengjun Sun Zheng Shen Hu He
Department of Mieroelectronics,Peking University Institute of Microelectronies,Tsinghua University Institute of Microelectronics,Tsinghua National Laboratory of Information and Technology,Tsinghua Un
国际会议
2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)
长沙
英文
75-78
2009-10-20（万方平台首次上网日期，不代表论文的发表时间）