A Reconfigurable Architecture Specific for the Butterfly Computing

摘要：

Morphosys is a reconfigurable single instruction multiple data sIMD) architecture mainly composing of host core processor,reconfigurable cells array, frame buffer,context memory and direct memory access (DMA) module. As a common SIMD-based coarse-grained reconfigurable architecture,each context configuration and operation is based on the whole row or column function, which may be inefficient in some applications such as butterfly computing,In this paper,an improved reconfigurable architecture is proposed specific for butterfly computing application. The main work includes interconnection network design optimization,context memory architecture redefinition with quadrant binding,DMA channel addition and some other corresponding modification in reconfigurable cell. With these improvements, the new architecture can implement typical butterfly computing with cycle count about 5.53%～18.9% less than Morphosys.

关键词： Morphosys reconflguration butterfly computing contezt interconnection

作者: Jing Xie Kai Fan Zhigang Mao Qin Wang Chao Yang Wen Zhu Suliang Wang

作者单位: School of Mieroelectronies,Shanghai Jiaotong Uinversity,Shanghai,200240,P.R.China

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 83-86

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）