会议专题

An Energy-Aware Heuristic Constructive Mapping Algorithm for Network on Chip

Network on Chip (NoC) is a promising interconnection solution for the ever-increasing systems comple ity and design productivity gap.Mapping the IP cores onto a given platform is an important phase of NoC design which can greatly affect the performance and energy consumption of the chip.In this paper,we analyze the pree istent mapping algorithms,and categorize them into three classes according to the tracks of obtaining the near optimal mapping. We present a fast hybrid heuristic constructive algorithm,i.e.CMAP,to map cores onto NoC architectures with the goal of minimizing the total communication energy consumption. The algorithm is applied to two real applications and a series of task graphs generated by TGFF package. The accuracy,efficiency and scalability of the proposed algorithm are confirmed by comparing the results of our algorithm with other mapping algorithms.

Network on Chip Constructive Mapping Algorithm Edge Mapping Scalability

Yancang Chen Lunguo Xie Jinwen Li

National University of Defense Technology,ChangSha,China Institute of Computer,National University of Defense Technology,ChangSha,China

国际会议

2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

长沙

英文

101-104

2009-10-20(万方平台首次上网日期,不代表论文的发表时间)