A LUT-based VRC Model For Random Logic Function Evolution
Recently,the VRC (Virtual Reconfigurable Cir cuit) has become a mainstream solution for EHW (Evolvable Hardware) research.In this paper,A LUT-based VRC model is proposed,which can be applied for random logic function evolution.Different kinds of LUTs with appropriate intercon nections were studied on a FPGA-based platform.Research were also performed in this platform to compare with the cur rent VRC model such as VRC1 (SinMan) and VRC2 (Sekanina). The results show that 3-input LUT with a direct inter connection achieves about 8% improvement in fitness value after 20,000 generations,and obtains obvious progress in logic resource utilization rate.
EHW VRC LUT-based VRC Genetic Algorithm
Haixiang Bu Liguang Chen Jinmei Lai
Microelectronies Depart,Fudan University 825 Zhangheng Rd,Shanghai,China,201203 Microelectronics Depart,Fudan University 825 Zhangheng Rd,Shanghai,China,201203 Microeleetronics Depart,Fudan University 825 Zhangheng d,Shanghai,China,201203
国际会议
2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)
长沙
英文
117-121
2009-10-20(万方平台首次上网日期,不代表论文的发表时间)