VLSI Architecture of a Low Complezity Face Detection Algorithm for Real-Time Video Encoding

摘要：

Combining video encoder and content analyzer to improve the encoding efficiency by content-aware algorithms is very challenging now. For the aiming application of low cost hardware real-time encoder with face detection for videophone,this paper proposes a face detection algorithm to detect each macroblock (MB) as one part of a face or not. This face detection algorithm has a unique estimation-and-verification process and can be combined with a H.264 encoder by MB level pipeline architecture.97. 91% MBs in faces can be detected.VLSI architecture of proposed face detection algorithm is designed and an area of 4.3κ gates is achieved.Power consumption is only 1.45mW at 100MHz. The detection speed achieves 1315fps in CIF sequences.

关键词： VLSI Architecture Face Detection

作者: Tianruo Zhang Minghui Wang Chen Liu Satoshi Goto

作者单位: School of Information,Production and Systems,Waseda University,Kitakyushu,Fukuoka,808-0135 Japan Graduate School of Information,Production and Systems,Waseda University,Kitakyushu,Fukuoka,808-0135

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 147-150

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）