New Architecture of Low Voltage Sigma-Delta ADC

摘要：

A low voltage low power sigma delta modulator was presented. A sigma delta modulator architecture which was very adapt to low voltage low power applications was proposed. With the advantage of both unity gain sigma delta modulator and traditional sigma delta modulator,it relaxed the requirement of the OTA performance and decreased the complex of the circuit.For lower power consumption as soon as possible,the technique of negative resistance load was used to improve the dc gain of the current mirror OTA and the technique of Class-AB output stage was used for lower power consumption.Simulation results showed that with 0.18um CMOS technology,20 KHz signal bandwidth and oversampling rate of 156,the modulator achieved 93dB dynamic range,the power consumption was 500uW under 1V supply voltage and the chip core size was 0.5mm2.Measure results showed that with 2MHz sampling frequency and 1KHz input signal the sigma delta modulator achieved 65dB SNR and 60dB SNDR.

关键词： low voltage low power consumption switched capacitor sigma delta modulator current mirror OTA

作者: Jiaxin Ju Wanrong Zhang Haolin Du Yanfeng Jiang Yamin Zhang

作者单位: Electronic Information and Control Engineering,Beijing University Of Technology,Beijing,100124,P.R.C College of Electronic Information and Control Engineering,Beijing University of Technology,Beijing,1 College of Information Engineering,North China University of Technology,Beijing,100144,P.R.China

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 203-206

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）