Analysis and Design of High Power Supply Rejection LDO
The power supply rejection (PSR) based on closed-loop low-dropout regulator (LDO) is analyzed to achieve high PSR in LDO,and help the designer meet the PSR requirement when considering the other performances of LDO. Using small signal model of MOS transistor, Kirchhoffs current/voltage law,and the tool of Mathematica, the PSR with DC gain,poles,and zeros of power stage and six kinds of basic amplifiers in LDO is analyzed theoretically, and proved by the simulation of Cadence Spectre.By tabling the PSR of eight Error Amplifier (EA) composite structures of two stages,the best combination of NMOS differential input amplifier(N-DA)+PMOS input common source amplifier (P-CS) is proposed on account of DC PSR property. An LDO containing an EA of the best structure has been designed with TSMC standard 0.35μm CMOS process. The measurement result of PSR is-75 dB @1 kHz. A novel guideline to improve PSR of LDO is proposed and it provides afresh design idea. Measurement results are in agreement with the analysis also.
PSR LDO EA of two stages siz kinds of basic amplifiers eight composite structures
Yali Shao Yi Wang Zhihua Ning Lenian He
Institute of Very Large Scale Integrated Circuit Design,Zhejiang University,China Zhejiang University,China
国际会议
2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)
长沙
英文
324-327
2009-10-20（万方平台首次上网日期，不代表论文的发表时间）