A 1.8V CMOS Polar Transmitter Front-end for 900MHz EDGE System

摘要：

A 900MHz low-noise high-linearity polar transmitter front-end for EDGE system is presented, including a multiplier as well as a driver amplifier. The whole circuit is implemented in IBM 0.18μm CMOS process. The multiplier and DA provide output power ranging from 30dBm to 4.5dBm,an ACPR of -63dBc at 400KHz offset and an output noise of -167dBm/Hz at 20MHz offset. The spurious around 2nd and 3rd harmonics are -46dBc and-39dBc respectively. The carrier suppression is -45dBc. The whole circuit consumes 23～56mA from a 1.8V supply voltage according to different gain levels.

关键词： EDGE system polar transmitter multiplier driver amplifier

作者: Ran Ren Taotao Yan Peichen Jiang Hao Hu Jianjun Zhou

作者单位: CARFIC (Center for Analog/RF integrated Circuits) Laboratory,School of Microelectronics,Shanghai Jia School of Microelectronics,Shanghai Jiao Tong University

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 395-398

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）