会议专题

Analysis and Design of a Fully Integrated SoC for UHF RFID Reader in CMOS Technology

This paper presents a fully integrated single chip UHF radio frequency identification (RFID) reader soC for short distance handheld applications. The SoC integrates all building blocks-including an RF transceiver,a PLL frequency synthesizer,a digital baseband and a MCU-in a 0.18um CMOS process. A high-linearity RX front-end and a low-phase-noise sythesizer are designed to handle the large self-interferer. A class-E power amplifier with high power efficiency is also integrated to fulfill the function of a RFID reader. The chip has a die area of 5.1mm*3.8mm including pads.

RFID UHF Reader SoC

Jingchao Wang Chun Zhang Baoyong Chi Zhihua Wang

Institute of Microelectronics,Tsinghua University,Beijing 100084,P.R.China

国际会议

2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

长沙

英文

415-418

2009-10-20(万方平台首次上网日期,不代表论文的发表时间)