Implementation of A High-Speed Parallel Turbo Decoder for 3GPP LTE Terminals

摘要：

This paper presents a parameterized parallel Turbo decoder for 3GPP LTE terminals. To support the high peak data-rate defined in the forthcoming 3GPP LTE standard,Turbo decoder with a throughout beyond 150Mbit/s is needed as a key component of the radio baseband chip.By exploiting the tradeoff of precision,speed and area consumption,a Turbo decoder with eight parallel SISO units is implemented to meet the throughput requirement. The turbo decoder is synthesized,placed and routed using 65nm CMOS technology.It achieves a throughput of 152Mbit/s and occupies an area of 0.7mm2 with estimated power consumption being 650mW.

关键词： Turbo 3GPP ASIC

作者: Di Wu Rizwan Asghar Yulin Huang Dake Liu

作者单位: Department of Electrical Engineering,Linkǒping University,58183 Linkǒping,Sweden

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 481-484

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）