A Flezible Architecture for Multi-Standard LDPC Decoders

摘要：

Since Low-Density Parity-Check codes have near-capacity decoding performance and very high decoding throughput, they have been employed as FEC coding scheme in many transmission standards for wireless communication, such as IEEE 802.22n,IEEE 802.16e,DVB-S2,and DTMB. This trend triggers the need for so-called multi-standard LDPC decoders.In this paper,a flexible architecture that supports multiple code rates, variable block sizes and is code independent for block-LDPC codes is proposed,based on rearranged TPMP algorithm.By implementing a dynamically reconfigurable RPPU,our proposed architecture can be configured into row update or column update mode by time-division multiplexing.Consequently,the decoder achieves a high area and power efficiency. to verify our proposed architecture,a novel LDPC decoder which supports IEEE802.16e standard has been implemented. The results on a 0.18um CMOS process show that the decoder occupies an area of approximately 13.7mm2 and runs correctly at an maximum operating frequency of 110 MHz,resulting in 98 Mbps decoding throughput.

关键词： LDPC codes TPMP multi-standard WiMAX

作者: Shuangqu Huang Bo Xiang Bei Huang Yun Chen Xiaoyang Zeng

作者单位: State Key Lab.of ASIC and System,Department of Microelectronics,Fudan University,Room 220,Rd.Zhanghe State Key Lab.of ASIC and System,Department of Microelectronics,Fudan University,Shanghai,China

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 493-496

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）