Implementation of LDPC decoder for 802.16e

摘要：

The implementation comple ity of the decoder for Low-density Parity-check Codes (LDPC) is dictated by memory and interconnection requirements.In this paper,we investigate the approaches to realize Turbo Decoding Message Passing (TDMP) algorithm.We compare the performance and implementation comple ity of original approach,Jacobian approach,normalized min-sum approach and offset rain-sum approach which are targeted for Quasi Cyclic (QC) LDPC code defined in IEEE 80.1 e standard. The normalized and offset approaches are more suitable for hardware implementation,which are realized on the FPGA.

关键词： LDPC min-sum TDMP

作者: Xiao Peng Satoshi Goto

作者单位: Graduate School of Information,Production and Systems of Waseda University,Japan

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 501-504

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）