An Area Efficient Multi-Mode Architecture for Reed-Solomon Decoder

摘要：

This paper proposes a multi-mode solution that can be implemented in any applications requiring more than one RS code rate.We develop the Multi-Symbol Process Element (PE) in KES part to meet the multi-mode applications requirement and greatly reduce hardware complexity. The Multi-Symbol PE makes KES module simple and regular as well as area efficient.Besides,basic cells of syndrome Calculation module and Error Correction module are grouped to meet the multi-mode goal With the method we provided in this paper,a general solution for multi-mode system can be concluded. The synthesis results of VLSI structure under CMMB standard show that it costs only 73,408 gates by SMIC 0.13μm library.

关键词： Reed-Solomon codes Multi-mode area efficient Multi-Symbol Process Element Reconfigurable architectures

作者: Bei Huang Shuangqu Huang Yun Chen Xiaoyang Zeng

作者单位: State Key Laboratory of ASIC & System,Fudan University,Shanghai,China

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 505-508

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）