A Self-Testing Assisted Pipelined-ADC Calibration Technique

摘要：

For embedded analog-to-digital converters (ADCs) fabricated with deep sub-micron technology, calibration has become mandatory to ensure acceptable yield against process variations. This paper presents a pipelined ADC calibration technique that targets the capacitor mismatch and comparator offset associated with the pipelined aDC stages. The calibration technique is self-testing assisted;it utilizes the built-in histogram testing circuitry to (1) obtain the necessary calibration information,and (2) validate the calibrated ADC.Simulation results show that the calibration strategy substantially enhances the ADC static linearity and dynamic performance.

关键词： pipelined ADC calibration built-in self-test mized-signal testing

作者: Jiun-Lang Huang Xuan-Lun Huang Ping-Ying Kang

作者单位: Graduate Institute of Electronics Engineering and Department of Electrical Engineering,National Taiwan University,Taipei 106,Taiwan

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 565-568

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）