Wireless Built-In Self-Repair Architectures for Embedded RAMs

摘要：

In order to reduce test and repair cost in advanced system-on-chip products,wireless built-in self-repair (BISR) techniques for embedded memories are proposed in this paper. The redundant memory is divided into spare rows,spare column group blocks,and spare words which are used to replace faulty cells in the main memory.Based on this redundancy architecture,a BISR scheme suitable for built-in implementation is proposed. According to simulation results,our techniques have higher repair rates and lower hardware overhead as compared with previous works.Finally, we integrated the proposed memory with BISR circuitry into the O wireless test system.E perimental results show that the hardware overhead (including the wireless interface modules) is only 0.for a 1 M-bit SRAM.

关键词： BISR Embedded Memory Reliability ield

作者: hen-Yu Wang Yi-Ming Tsai Yuan-Cheng Hsiao Shyue-Kung Lu

作者单位: Department of Electronics Engineering,Fu-Jen Catholic University,24205,Taipei,Taiwan Department of Electrical Engineering,National Taiwan University of Science and Technology,Taipei,Tai

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 573-576

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）